TEAM

Career

• Samsung Semiconductor Design Engineer, Senior Engineer (9 years)
• Samsung SoC Physical Design, Principal Engineer (9 years)
• Samsung SoC Design, Senior Principal Engineer (7 years)
• Samsung SoC Verification, Senior Principal Engineer (8 years)

Expertise

• RTL Design and High-speed Interface Link Layer Design
• Functional verification with SystemVerilog and UVM
• Logic Synthesis, DFT, STA, and Physical Design

• Samsung Semiconductor Design Engineer (5 years)
• Samsung Semiconductor Sales & Marketing (10 years)
• Nepes AI Semiconductor and Neuromorphic Device Planning & Marketing (3 years)
• Cadence Design Systems, Samsung Foundry Account Manager
• ADTechnology, Samsung Foundry Account Manager (3 years)
• Fabless and SoC design/business planning (2 years)

Career

• Assistant Professor, School of Integrated Technology, Yonsei University (2025–)
• Postdoctoral Researcher, KAIST Information and Electronics Research Institute (2 years)

Expertise

• Application-specific AI silicon chip design
• AI chip architecture and embedded AI systems
• Hardware–software co-optimization for AI applications
• RTL Design, Logic Synthesis, and Physical Design