SeM-V1 · ALWAYS-ON VOICE AGENT SOC
SeM-V1
Always-On Voice Agent SoC
On-Device Voice AI SoC
for Always-On Processing
CLOUD-STREAMED VOICE PIPELINE
REMOTE
Continuous audio uplinkNetwork-dependent inference
Cloud round-trip latency
Cloud-Streamed vs.
On-Device Inference
ON-DEVICE VOICE PIPELINE
LOCAL
KWS · Wake Word · STTLocal inference execution
No continuous audio uplink
ARCHITECTURE · ON-DEVICE VOICE INFERENCE
On-Device Voice Inference Pipeline
SeM-V1 is designed to execute KWS, wake-word detection, and STT workloads on device, so supported functions do not require continuous raw-audio streaming to the cloud.
- Always-On Voice MonitoringExecution path designed for continuous keyword and wake-word detection
- Energy-Efficient InferenceClustered compute and local SRAM reduce data movement
- On-Device ExecutionKWS, wake word, and STT run on the local device path
PRODUCT DETAIL · VUI EDGE AI
SeM-V1
Always-On Voice Agent SoC
A low-power on-device Voice AI SoC development system for KWS, wake-word detection, and STT workloads, including compiler, runtime, profiling, and evaluation hardware.
- Keyword Spotting (KWS)
- Wake-Word Detection
- Speech-to-Text (STT)
- Compiler · Runtime · Profiling
Model → Software → NPU → Silicon
- Voice Model
Profile operators, tensor shapes, data reuse, and latency
- Compiler & Runtime
Partition graphs; map dataflow and memory
- Clustered NPU
Couple compute clusters with local SRAM
- 28 nm Silicon
Samsung Foundry 28 nm physical implementation
Always-On Voice Monitoring
Execution path designed for continuous keyword and wake-word detection
Energy-Efficient Inference
Clustered compute and local SRAM reduce data movement
On-Device Execution
KWS, wake word, and STT run on the local device path
PRODUCT LINES
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01 / 05
SEM PRODUCT · IN DEVELOPMENT
SeM-V1 Development Status
- SeM-V1Physical silicon planned 2027.03.31
- 3–5 TOPS/WCurrent internal range
- 3 Voice WorkloadsKWS · Wake Word · STT
- Compiler · Runtime · ProfilingDeployment software · silicon · evaluation hardware
- 7 Patent ApplicationsKorean applications · pending
The image shows the SeM-V1 package concept and evaluation platforms. It is not a photograph of finished SeM-V1 silicon.
PRODUCT 02 · SeM-V2
Coming Soon
Product architecture, target workloads, and performance specifications will be disclosed with the development schedule.
PRODUCT 03 · SeM-V3
Coming Soon
Product architecture, target workloads, and performance specifications will be disclosed with the development schedule.
PRODUCT 04 · SeM-N1
Coming Soon
Product architecture, target workloads, and performance specifications will be disclosed with the development schedule.
SUAI LINE · TEST SILICON
SUAI Test Chip
A PIM-like NPU test chip built to move Semunite’s architecture into physical hardware validation.
- Product lineSUAI research silicon
- Physical siliconSecured 2026.06.22
- ArchitecturePIM-like NPU test implementation
- PurposeArchitecture and hardware validation
SUAI is a separate test-chip line. It is not SeM-V1 and does not represent final SeM-V1 commercial specifications.
Voice Model Evaluation
Assess SeM-V1 mapping feasibility from operator mix, tensor shapes, memory footprint, and latency targets.
Request Model EvaluationSoC System Integration
Define the NPU IP, silicon, and deployment-software scope from target-product interfaces and power and area budgets.
Discuss System Integration